05 April 2025 - 11 April 2025
Table of Contents
- 1. LECTURES IN DISCRETE MATHEMATICS
- 2. GMPASM assembler
- 3. Programmable power supply
- 4. Raspberry Pi Pico
- 5. Github website
- 6. Sonic Fiber
- 7. Night Light
- 8. Sparkfun Addressable LED
- 9. Stalled project review
- 10. GMPForth
- 11. SJ grounds
- 12. Lapuz Peking/Panerus
- 13. Mill
- 14. EDA workflow
- 15. Spark/QEMU
- 16. Cross compilers
- 17. SCZ Front Step
- 18. Spacewire-like PHY
- 19. CA Root Key Generation
- 20. Compilers
- 20.1. Compiled Wikipedia PL/0 example
- 20.2. Work out overall plan.
- 20.3. Looking into LLVM MLIR.
- 20.4. ASDL
- 20.4.1. current smlnj C++ implementation incomplete
- 20.4.2. old versions asdl source fail to build with new versions of smlnj
- 20.4.3. old versions of smlnj not easily buildable on x8664
- 20.4.4. ancient binary of asdl 1.2 compiler seems to work
- 20.4.5. analyzing asdl 1.2 generated code
- 20.4.6. run in vm?
- 21. Piper dovecot
- 22. Various i686
- 23. piper
- 24. Buffalo WZR-HP-G300NH
- 25. SJC weather station
- 26. opencl
- 27. EPLDH
- 28. wktpqb
- 29. Virtual Orchestra
- 30. gat
- 31. RIOT drivers
- 32. mcd05 32 button/led box
- 33. AMD 2900 bitslice computing
- 34. Hitachi HD68B09E CPU
- 35. Rockwell R65F11
- 36. PLD programming
- 37. EPROM Programming
- 38. POSIT
- 39. MAME
- 40. More project ideas
- 41. David Davies
1. LECTURES IN DISCRETE MATHEMATICS
https://cseweb.ucsd.edu/~gill/BWLectSite/ Too distracted to work on this.
2. GMPASM assembler
2.1. ternary expressions
Finally figured it out.
2.2. line continuation started
What a PITA
3. Programmable power supply
3.1. Determined that I have 3 18V 2A main power supplies
4. Raspberry Pi Pico
Parts received.
5. Github website
Added commit hook to stop commits to main branch.
6. Sonic Fiber
6.1. rsyncing status page to g1
better then nothing for waiting a week to get to SJ to update the address.
6.2. exposing by hand via barelyworking.com
6.3. IP addr changes every power outage
Probably should get a UPS
6.4. bind notifies not working
need to debug
7. Night Light
Was stuck on - now burned out. Looks like the SCR has an anode-cathode low impedance path. Amazingly enough, the SCR it uses is still available from Digikey.
8. Sparkfun Addressable LED
8.1. Prototype for Kevin. Using Arduino build system with FastLED library.
8.2. Works with RIOT OS.
9. Stalled project review
9.1. Garden orb
Can't find the glass orb, so don't worry about it until it's found.
9.2. Brini-tracker
Better to use an integrated hand-held device (pinephone64 or similar). Maybe use the GPS modules for a local NTP time server.
9.3. Coil piano
Totally a victim of analysis paralysis.
9.3.1. Investigated beagleboard
Could use PRU for PWMs or wide SPI bus. Not sure if the effort is worth it relative to other appoaches; PRU code, linux audio device driver, bandwidth between ARM core and PRU, etc. Could be interesting; is it more interesting than other stuff?
9.3.2. STM32f676zi
Could get ~26 PWMs of various quality on board. Plus two 12bit DACs, a SPI port for a SPI based DAC, and a async memory bus for discrete DACs. Haven't finished pin assignments.
10. GMPForth
10.1. QEMU linux targets
…now segfault. Need to debug.
10.2. QEMU bare-metal targets
Starting to think about appoach. May start with running under u-boot to ease the inital effort of CPU initialization.
10.3. Multitasking
10.3.1. How would a classic round-robin multitasker interact with multiple cores?
10.3.2. Any insight from CSP or the Golang concurrency model?
10.3.3. Continuations?
11. SJ grounds
nothing going on…
12. Lapuz Peking/Panerus
Laid out keys. Keys are too big for Burhan's "restaraunt" cases. Ray to think about the next steps. Haven't heard anything back in months.
13. Mill
13.1. Supposedly working now.
13.2. Except I can't get it to turn on.
There's some trick I'm missing: apparently the controller is powered off the 220V, not a separate 110V like before.
14. EDA workflow
14.1. FPGA programming
14.2. RV32I
Seeing if a very simple RV32I is possible at ~600 ice40 cells. Likely not possible with a barrel shifter unless a multiplier is used. Certainly won't be fast, if possible at all at this size. This comes out to 18 gates per bit, which seems to be a ridiculously low number. Need to refine counting methodology to count LUTs and flops separately. Maybe further refinements for post-placement utilization (for example, how many LUTs get combined with a flop vs. separate LUTs and flops).
14.2.1. 'almanor' RV32I
- Three port register file, simplify decoder (~1100 LUTs, 300 FFs, 4 BRAM)
Not too happy with the result. Messier than expected.
- Refactoring
Still trying to understand what's driving the gate count. need to do some scaling experiments (FF/LUT per bit for various constructs).
- Post-synthesis testbench
Fragility much reduced after aggressive process splitting.
- Verilator testbench
Started planning.
- CSR/Debug interfaces
Seeing if it's worth it to implement minimal CSR and debug interfaces
- Picosoc analysis
Understanding picosoc implementation as a reference
- Standard tests
- riscv-arch-test
Ported and running. After changing verilog memory image generation to use objcopy, and correcting JALR masking, all RV32I tests pass.
- riscv-torture
- Used picorv32 patches to generate test cases.
Tried generalizing the Scala code, but looks like it was going to require more changes than I was comfortable with making - particularly for the E reduced register profiles.
- Regex filter
Wrote a regex based filter to change opcodes and various ranges for RV32I, RV32E and RV64E.
- Tests pass
All torture tests pass.
- Used picorv32 patches to generate test cases.
- riscv-arch-test
- Compare with a pipelined implementation
Still thinking about it.
- Debug and Interrupt architecture
Working out what's needed.
14.3. RTX-2000
Pulled out the RTX-2000 manual. Going to be a slog if I do it.
14.4. Synthesizable sparc v8
14.4.1. Seeing what it takes to make 'bs' synthesizable.
No way. Need to start fresh.
14.4.2. make smaller than picorv32?
Want to see if I can get something substantially smaller than picorv32 - although I doubt it. Better to start with RV32I though.
14.4.3. Found a bug
in load base/offset register instructions.
14.4.4. Found maybe another bug
Not sure about condition codes on 'sub'. Difficulty porting to rv32 leads to questions.
14.4.5. Cleanups
Apparently never run though verilator. Cleaned up.
14.4.6. Need legion
Need to see if the UltraSparc 10 is still running for legion tests.
14.4.7. u10
- Serial port works so boot is trying to do something.
- Doesn't seem to respond to 'break'
Enhanced 'sp' to send break command.
- NVRAM battery is dead. Not a FRU.
Needs an invasive fix or part replacement. NVRAM held MAC address, so that would be unavailable so could explain not booting. DHCP database has programmed MAC for static IP assignment so that at least is recoverable.
- Video dongle.
Dongle works with VGA monitor. Updating NVRAM parameters on console allows system to boot.
- Recovered legion
Copied off legion simulator binaries.
15. Spark/QEMU
Tested QEMU sparc simulator running Solaris 5. Probably a reasonable alternative to using u10.
16. Cross compilers
16.1. Toolchain scripts running.
16.1.1. moxie-elf c, c++, and ada.
16.1.2. sparc-elf c, c++, and ada.
16.1.3. riscv-elf c, c++, and ada.
gdb riscv simulator seems to not handle logical right shifts correctly in 32 bit mode. Arithmetic right shift has specific checks for 32 bit mode, but logical right shift does not and is clearly right shifting a 64 bit value.
17. SCZ Front Step
17.1. Starting to fit.
Hanging up on something hidden.
17.2. Need to fix mistake under window.
Have a patch piece.
18. Spacewire-like PHY
Poking that this long-standing problem. Building infrastructure to test if it's possible to construct a PHY layer with acceptable BER to 50 MBit which should be sufficient for 32 16-bit channels at 48 KHz sample rate. Need to re-establish EDA workflow.
Not sure this is practical.
19. CA Root Key Generation
Nice to have an appliance that manages keys. Need to make this simple. Really don't have time for a science project. Too, bad, though. It kind of is a science project. Could just buy something from nitrokey https://www.nitrokey.com/ but I really don't want to spend money on it of I have hardware already. Looking at nitrokey in more detail, it doesn't seem to be any simpler than what I'm doing already.
19.1. First pass done
19.1.1. Based on https://pki-tutorial.readthedocs.io/en/latest/simple/
Interesting that the certs generated fail with openssl sserver testing because the cryptographic algorithms are too weak.
19.2. Need to be clear on security properties.
Definitely protect against remote access to private keys. How strong does the protection against local access need to be?
19.3. Simple hardware.
19.3.1. Use beagleboard with local interface
19.3.2. Use some modern device TPM
Need to export data for backup.
19.3.3. Or something that uses PKCS11 interface
19.4. USB Serial interface only but no credentials across USB I/F.
But this potentially exposes the hardware to remote access via the USB I/F when connected.
19.5. Use Sneakernet
Doesn't scale. Should use something so cert updates are automatable. But that's a science project it seems.
20. Compilers
20.1. Compiled Wikipedia PL/0 example
20.2. Work out overall plan.
Lots of moving pieces.
20.3. Looking into LLVM MLIR.
Will not use immediately, but perhaps trend in that direction.
20.4. ASDL
20.4.1. current smlnj C++ implementation incomplete
20.4.2. old versions asdl source fail to build with new versions of smlnj
20.4.3. old versions of smlnj not easily buildable on x8664
20.4.4. ancient binary of asdl 1.2 compiler seems to work
but associated libraries are to old to link because of missing ctype symbol
20.4.5. analyzing asdl 1.2 generated code
Most of the code is for serialization, which is going to be replaced anyway, so can be removed by hand.
20.4.6. run in vm?
Analysis of binaries shows that it was built on some redhat os using gcc 2.8.1. Redhat-6.2? No. Tried various ancient Redhat OSs.
21. Piper dovecot
21.1. Update broke dovecot auth.
Looks PAM related, but PAM update failed to fix.
21.2. Set tuffy up as a staging server
So I don't debug on 'production'.
21.3. piper dovecot SSL certificate NOT broken
At least not obviously broken (yet). Further investigation needed.
22. Various i686
22.0.1. netbsd
was installed. But needed the box for something else.
22.0.2. buildroot
builds complete.
23. piper
23.1. dovecot
23.1.1. Raising apparmor error.
Not sure how to resolve.
23.2. pidgeonhole
23.2.1. procmail replacement.
23.2.2. Considering integration.
23.3. httpd
23.3.1. Still stable.
But seems to occassionally mis-serve files.
23.4. SSL cert
Trying letsencrypt with certbot. http problem above may be interfering.
23.5. redmine
Still not sure I want to go down this rabbit hole.
23.6. openvpn
Need to consider cert construction.
24. Buffalo WZR-HP-G300NH
24.1. Update
Sometime next year.
25. SJC weather station
25.1. Proper enclosure mostly constructed
25.1.1. Needs a redo on bottom plate
25.1.2. Seems to have improved wireless connectivity somewhat
26. opencl
26.1. Studying. Have some examples working.
26.2. Need to look at arrayfire as an alternative.
26.3. This is a bit of a hammer looking for a nail.
27. EPLDH
27.1. MPFI interval arithmetic better alternative
28. wktpqb
28.1. needs a new approach
28.2. Verifying edge construction (con't.)
28.3. 'gcd' algorithm doesn't work
29. Virtual Orchestra
29.1. sfz file tests
29.1.1. need tooling to edit sample files
29.2. increasingly skeptical whether quality results are possible
29.3. maybe should treat as platform for concatinative synthesis
29.4. maybe should just accept the limitations and work with it
One should not be disappointed that a guitar can't sound like a flute.
30. gat
30.1. spectrogram done - matches 'octave' output
31. RIOT drivers
Implemented - needs testing.
31.1. WS2801
31.2. Velleman KA03
31.3. Velleman KA05
32. mcd05 32 button/led box
32.1. Recovered schematics.
32.2. Planning software.
32.3. Received STM32F767 Nucleo144 with Ethernet.
32.3.1. Test program running.
32.3.2. Need to consider CoAP multicast discovery.
32.3.3. Consider simpler architecture with STM32F767 as a 'hub'.
32.3.4. Consider CAN interface to hub.
33. AMD 2900 bitslice computing
33.1. Probably my oldest uncompleted project
33.2. Exploring possibilities for something constructive
Create verilog models for 2903/2910 and verify against hardware?
34. Hitachi HD68B09E CPU
34.1. RAM/UART/IO
34.2. Started schematic
34.2.1. Standard peripheral set for 8 bit CPU bringups
Board schematic planned - need Kicad symbols
34.3. Arduino Mega 2560 DMA loader
…Along with standard 8 bit loader
34.4. Generate quadrature clock directly
34.5. Full Bus SW Emulation infeasible
6809 1000ns maximum cycle time too short
35. Rockwell R65F11
35.1. Still evaluating.
35.2. Dev board
Reverse engineered some of a mostly fully built development board with one part missing. As near as I can tell, that one part is some sort of programmable address decoder with a pinout that does not correspond to any part I can find. Kind of like a GAL but with inputs on top and outputs on bottom (as opposed to left and right in a standard GAL). I have no idea what the provenance of this board is and if it ever worked.
36. PLD programming
Looks like Atmel 16V8 is the last 5V PLD part left standing. Maybe not surprising that there still doesn't appear to be a fully open source tool chain for programming. How hard could it be? (!) Could next-pnr generic help? Might be easier to use espresso for logic array and program output logic bits directly for simple stuff.
37. EPROM Programming
Found some software for Needham programmer. Need to check electrolytic caps on ISA board.
38. POSIT
38.1. Use POSITs for YRX?
No. Existing library is fine.
39. MAME
39.1. Subset builds in debug mode
Full debug fails - not enough disk or memory.
39.2. gs6809 serial IO doesn't work right with PTY and other streams
39.3. ampro (Z80/Z80SIO) does work with PTY
39.4. Evaluating what is needed for other emulators.
40. More project ideas
40.1. Zuse Z3 simulation in Verilog
Good excuse for floating point ALU design. Try posit format?
40.2. GMPForth ports to simulators
40.2.1. SIMH for some targets (vax)
40.2.2. MAME looks interesting for microprocessor system emulations
How to support ersatz systems?
40.2.3. Ports to classic figFORTH targets
40.3. Extracting ISO Superboard Forth ROMS for MAME emulation
40.4. 'bwocl' OpenCL tooling
40.4.1. Offline compilation
40.4.2. Standard Kernel Running
40.5. hardware support for classic 5V CPUs
40.5.1. RTX2000, CDP1802 still available!
40.5.2. 6502, 68000, 320C30, others on hand
40.5.3. CPUs with totally async bus may be supportable without RAM
40.5.4. Could use small footprint monitor in asm (gmpmon?)
40.6. Existing 'retro' hardware still working?
40.6.1. OSI Superboard
Unknown. Composite to VGA adapter didn't seem to work. Needs analysis. Found OSI model 610 board underneath!
40.6.2. Super Jolt
No output. Needs analysis.
40.6.3. Ampro Little Board
Not booting. Needs analysis.
40.6.4. Rockwell R65F11 Demo board
UART sending "NO ROM" at 2400 7N1 as expected with 2MHz xtal. MAME emulator possibilities?
40.6.5. NMIX-0016
Works. Found original prom in a parts stash(!).