03 August 2024 - 09 August 2024

Table of Contents

1. MIT OCW

1.1. 18.06sc (Linear Algebra)

1.1.1. Unit III: Positive Definite Matrices and Minima

2. SJ grounds

Too Busy.

3. EDA workflow

3.1. FPGA programming

3.2. RV32I

Seeing if a very simple RV32I is possible at ~600 ice40 cells. Likely not possible with a barrel shifter unless a multiplier is used. Certainly won't be fast, if possible at all at this size. This comes out to 18 gates per bit, which seems to be a ridiculously low number.

3.2.1. 'almanor' RV32I

  1. Initial implementation with all opcodes tested at ~4800 cells.
  2. Working out register file. This will definitely add more states.
  3. Need to understand register file tradeoffs.

3.3. RTX-2000

Pulled out the RTX-2000 manual. Going to be a slog if I do it.

3.4. Synthesizable sparc v8

3.4.1. Seeing what it takes to make 'bs' synthesizable.

No way. Need to start fresh.

3.4.2. make smaller than picorv32?

Want to see if I can get something substantially smaller than picorv32 - although I doubt it. Better to start with RV32I though.

3.4.3. Found a bug

in load base/offset register instructions.

3.4.4. Found maybe another bug

Not sure about condition codes on 'sub'. Difficulty porting to rv32 leads to questions.

3.4.5. Cleanups

Apparently never run though verilator. Cleaned up.

3.4.6. Need legion

Need to see if the UltraSparc 10 is still running for legion tests.

3.4.7. u10

  1. Serial port works so boot is trying to do something.
  2. NVRAM battery is dead. Not a FRU.

    Needs an invasive fix or part replacement. NVRAM held MAC address, so that would be unavailable so could explain not booting. DHCP database has programmed MAC for static IP assignment so that at least is recoverable.

  3. Ordered video dongle.

    May help in further analysis. I don't think my analog monitors work anymore, but maybe I'm wrong. Worth checking.

4. Cross compilers

4.1. Toolchain scripts running.

4.1.1. moxie-elf c, c++, and ada.

4.1.2. sparc-elf c, c++, and ada.

4.1.3. riscv-elf c, c++, and ada.

gdb riscv simulator seems to not handle logical right shifts correctly in 32 bit mode. Arithmetic right shift has specific checks for 32 bit mode, but logical right shift does not and is clearly right shifting a 64 bit value.

5. SCZ Front Step

5.1. Mostly complete.

5.2. Needs angled cuts on ends.

5.3. Need to fix mistake under window.

Didn't use the story stick. Grrr!

6. Spacewire-like PHY

Poking that this long-standing problem. Building infrastructure to test if it's possible to construct a PHY layer with acceptable BER to 50 MBit which should be sufficient for 32 16-bit channels at 48 KHz sample rate. Need to re-establish EDA workflow.

Not sure this is practical.

7. CA Root Key Generation

Nice to have an appliance that manages keys. Need to make this simple. Really don't have time for a science project. Too, bad, though. It kind of is a science project. Could just buy something from nitrokey https://www.nitrokey.com/ but I really don't want to spend money on it of I have hardware already. Looking at nitrokey in more detail, it doesn't seem to be any simpler than what I'm doing already.

7.1. First pass done

7.1.1. Based on https://pki-tutorial.readthedocs.io/en/latest/simple/

Interesting that the certs generated fail with openssl sserver testing because the cryptographic algorithms are too weak.

7.1.2. Work continues

  1. Have an outline with ECDSA/NIST-384
  2. Have consolidated configuration across CAs.
  3. Trying to decide if/how to deal with revocation. What a PITA.

7.2. Need to be clear on security properties.

Definitely protect against remote access to private keys. How strong does the protection against local access need to be?

7.3. Simple hardware.

7.3.1. Use beagleboard with local interface

7.3.2. Use some modern device TPM

Need to export data for backup.

7.3.3. Or something that uses PKCS11 interface

7.4. USB Serial interface only but no credentials across USB I/F.

But this potentially exposes the hardware to remote access via the USB I/F when connected.

7.5. Use Sneakernet

Doesn't scale. Should use something so cert updates are automatable. But that's a science project it seems.

8. Compilers

8.1. Compiled Wikipedia PL/0 example

8.2. Work out overall plan.

Lots of moving pieces.

8.3. Looking into LLVM MLIR.

Will not use immediately, but perhaps trend in that direction.

8.4. ASDL

8.4.1. current smlnj C++ implementation incomplete

8.4.2. old versions asdl source fail to build with new versions of smlnj

8.4.3. old versions of smlnj not easily buildable on x8664

8.4.4. ancient binary of asdl 1.2 compiler seems to work

but associated libraries are to old to link because of missing ctype symbol

8.4.5. analyzing asdl 1.2 generated code

Most of the code is for serialization, which is going to be replaced anyway, so can be removed by hand.

8.4.6. run in vm?

Analysis of binaries shows that it was built on some redhat os using gcc 2.8.1. Redhat-6.2? No. Tried various ancient Redhat OSs.

9. Piper dovecot

9.1. Update broke dovecot auth.

Looks PAM related, but PAM update failed to fix.

9.2. Set tuffy up as a staging server

So I don't debug on 'production'.

9.3. piper dovecot SSL certificate NOT broken

At least not obviously broken (yet). Further investigation needed.

10. Various i686

10.0.1. netbsd

was installed. But needed the box for something else.

10.0.2. buildroot

builds complete.

11. piper

11.1. dovecot

11.1.1. Raising apparmor error.

Not sure how to resolve.

11.2. pidgeonhole

11.2.1. procmail replacement.

11.2.2. Considering integration.

11.3. httpd

11.3.1. Still stable.

But seems to occassionally mis-serve files.

11.4. SSL cert

Trying letsencrypt with certbot. http problem above may be interfering.

11.5. redmine

Still not sure I want to go down this rabbit hole.

11.6. openvpn

Need to consider cert construction.

12. Buffalo WZR-HP-G300NH

12.1. Update

Sometime next year.

13. SJC weather station

13.1. Proper enclosure mostly constructed

13.1.1. Needs a redo on bottom plate

13.1.2. Seems to have improved wireless connectivity somewhat

14. opencl

14.1. Studying. Have some examples working.

14.2. Need to look at arrayfire as an alternative.

14.3. This is a bit of a hammer looking for a nail.

15. EPLDH

15.1. MPFI interval arithmetic better alternative

16. wktpqb

16.1. needs a new approach

16.2. Verifying edge construction (con't.)

16.3. 'gcd' algorithm doesn't work

17. Mill Controller #2

17.1. Mounted on mill - ready or testing

17.2. Need to investigate new HW/SW for eventual replacements

17.2.1. Old crap ain't gonna last forever

17.2.2. Buildroot/Linux 5.15 PREEMPT + latency tools

First pass done - boots on real hardware

17.3. Alternative architecture

17.3.1. Split off stepper motor controller to separate board

Increase latency tolerance on controller

17.3.2. Use emc2 MODBUS/TCP protocol for stepper and other IO

18. Alum Rock Data Center

18.1. May have problem with network power module.

It's only 30 years old or something like that.

18.2. Added Ethernet card to tuffy

Preparing as backup/staging server.

18.3. Need a VPS with static IP

Just use dynamic interface to bind.

19. Virtual Orchestra

19.1. sfz file tests

19.1.1. need tooling to edit sample files

19.2. increasingly skeptical whether quality results are possible

19.3. maybe should treat as platform for concatinative synthesis

19.4. maybe should just accept the limitations and work with it

One should not be disappointed that a guitar can't sound like a flute.

20. gat

20.1. spectrogram done - matches 'octave' output

21. RIOT drivers

Implemented - needs testing.

21.1. WS2801

21.2. Velleman KA03

21.3. Velleman KA05

22. mcd05 32 button/led box

22.1. Recovered schematics.

22.2. Planning software.

22.3. Received STM32F767 Nucleo144 with Ethernet.

22.3.1. Test program running.

22.3.2. Need to consider CoAP multicast discovery.

22.3.3. Consider simpler architecture with STM32F767 as a 'hub'.

22.3.4. Consider CAN interface to hub.

23. AMD 2900 bitslice computing

23.1. Probably my oldest uncompleted project

23.2. Exploring possibilities for something constructive

Create verilog models for 2903/2910 and verify against hardware?

24. Hitachi HD68B09E CPU

24.1. RAM/UART/IO

24.2. Started schematic

24.2.1. Standard peripheral set for 8 bit CPU bringups

Board schematic planned - need Kicad symbols

24.3. Arduino Mega 2560 DMA loader

…Along with standard 8 bit loader

24.4. Generate quadrature clock directly

24.5. Full Bus SW Emulation infeasible

6809 1000ns maximum cycle time too short

25. Rockwell R65F11

25.1. Still evaluating.

25.2. Dev board

Reverse engineered some of a mostly fully built development board with one part missing. As near as I can tell, that one part is some sort of programmable address decoder with a pinout that does not correspond to any part I can find. Kind of like a GAL but with inputs on top and outputs on bottom (as opposed to left and right in a standard GAL). I have no idea what the provenance of this board is and if it ever worked.

26. PLD programming

Looks like Atmel 16V8 is the last 5V PLD part left standing. Maybe not surprising that there still doesn't appear to be a fully open source tool chain for programming. How hard could it be? (!) Could next-pnr generic help? Might be easier to use espresso for logic array and program output logic bits directly for simple stuff.

27. EPROM Programming

Found some software for Needham programmer. Need to check electrolytic caps on ISA board.

28. POSIT

28.1. Use POSITs for YRX?

No. Existing library is fine.

29. MAME

29.1. Subset builds in debug mode

Full debug fails - not enough disk or memory.

29.2. gs6809 serial IO doesn't work right with PTY and other streams

29.3. ampro (Z80/Z80SIO) does work with PTY

29.4. Evaluating what is needed for other emulators.

30. More project ideas

30.1. Zuse Z3 simulation in Verilog

Good excuse for floating point ALU design. Try posit format?

30.2. GMPForth ports to simulators

30.2.1. SIMH for some targets (vax)

30.2.2. MAME looks interesting for microprocessor system emulations

How to support ersatz systems?

30.2.3. Ports to classic figFORTH targets

30.3. GMPASM assembler

May be useful for handbuilt and rare systems (DMX1000?).

30.4. Extracting ISO Superboard Forth ROMS for MAME emulation

30.5. 'bwocl' OpenCL tooling

30.5.1. Offline compilation

30.5.2. Standard Kernel Running

30.6. hardware support for classic 5V CPUs

30.6.1. RTX2000, CDP1802 still available!

30.6.2. 6502, 68000, 320C30, others on hand

30.6.3. CPUs with totally async bus may be supportable without RAM

30.6.4. Could use small footprint monitor in asm (gmpmon?)

30.7. Existing 'retro' hardware still working?

30.7.1. OSI Superboard

Unknown. Composite to VGA adapter didn't seem to work. Needs analysis. Found OSI model 610 board underneath!

30.7.2. Super Jolt

No output. Needs analysis.

30.7.3. Ampro Little Board

Not booting. Needs analysis.

30.7.4. Rockwell R65F11 Demo board

UART sending "NO ROM" at 2400 7N1 as expected with 2MHz xtal. MAME emulator possibilities?

30.7.5. NMIX-0016

Works. Found original prom in a parts stash(!).

31. David Davies

31.1. Broadcom (BCG?) Employee indicted for running a brothel.

31.2. New case C1923172, consolidated with 15 Parties.

31.3. Court website no longer allows seaching (grrr!)

Author: Daniel Kelley

Created: 2024-08-17 Sat 04:43

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