13 July 2024 - 19 July 2024

Table of Contents

1. MIT OCW

1.1. 18.06sc (Linear Algebra)

1.1.1. Unit II: exam 2

2. SJ grounds

Too Busy

3. EDA workflow

3.1. FPGA programming

3.1.1. Local Openroad ASIC flow working

…with some TCL hacks; tutorial runs to completion

3.1.2. PRBS programmable LFSR complete

Running on hardware

3.2. yosys TCL flows

nice!

3.3. FPGA block bakeoff (gscc)

Test claim that IEEE-1660 is not much more complicated than a UART. Maybe true for a fancy UART, but it does seem to be less complicated than other network functions.

This also started working out what a VHDL flow would look line, as spwl was in VHDL.

Tables show gate counts across various FPGA and ASIC standard cell targets.

3.3.1. Communications

block ice40 xilinx osu035 gf180 sky130
uart 257 327 478 394 385
spacewire 489 518 996 875 822
spwl 660 597 4024 2566 2485
i2c 671 781 1190 1039 981
spi 1366 1057 2339 1975 1949
can 4257 2048 9069 6454 6693
eth 6400 4478 55169 33301 32193
usb 8423 6483 17065 12470 12720

3.3.2. CPUs

block ice40 xilinx osu035 gf180 sky130
turbo9 2896 2673 6042 4720 4743
picorv32 2617 2452 11252 7038 6460
amber 11197 13518 648526 412378 531710
navre 2355 1451 3879 3090 3008
aemb 3815 1950 16888 11424 11788
lm32 2343 2567 12023 8624 9027
mps430 4254 4113 8184 6930 6621
or1200 10369 7608 791387 449479 443063
zipcpu 14235 5025 (1) (1) (1)

(1) abc took too long

3.4. Synthesizable sparc v8

3.4.1. Seeing what it takes to make 'bs' synthesizable.

Of course it is a lot more work that expected - I just can't hack the behavioral model into submission.

3.4.2. make smaller than picorv32?

Want to see if I can get something substantially smaller than picorv32 - although I doubt it.

3.4.3. Found a bug

in load base/offset register instructions.

4. Cross compilers

4.1. Need sparc-elf toolchain to test 'bs' bug.

Resurrecting cross toolchain scripts because I can't find my previous ones. Seems to be a build failure in newlib-4.4.0 sparc libgloss.

5. SCZ Front Step

5.1. Target piece rabbet cut.

6. Andromeda Path analysis

I think I will put this to bed.

6.1. Initial path complete.

6.2. Continuing "fun" reconciling EDD catalog with GAIA DR3

6.2.1. Distance modulus data more or less matches

6.2.2. Studying refinement of DR3 parallax conversion

A lot more complicated! Gaiasky has bayesian path database.

6.2.3. Initial "two step path" to M31

Now it's a physics problem of whether any constructed artifact can traverse 700 kiloparsecs.

7. John Ralston

Ralston Family plot is the first next to the road on the south end.

8. Spacewire-like PHY

Poking that this long-standing problem. Building infrastructure to test if it's possible to construct a PHY layer with acceptable BER to 50 MBit which should be sufficient for 32 16-bit channels at 48 KHz sample rate. Need to re-establish EDA workflow.

8.1. RIOS OS

8.1.1. Nucleo boards build fine

8.1.2. Arduino Uno builds fine

8.1.3. Some difficulty getting SPI on F767ZI to work but now resolved

9. CA Root Key Generation

Nice to have an appliance that manages keys. Need to make this simple. Really don't have time for a science project. Too, bad, though. It kind of is a science project. Could just buy something from nitrokey https://www.nitrokey.com/ but I really don't want to spend money on it of I have hardware already. Looking at nitrokey in more detail, it doesn't seem to be any simpler than what I'm doing already.

9.1. First pass done

9.1.1. Based on https://pki-tutorial.readthedocs.io/en/latest/simple/

Interesting that the certs generated fail with openssl sserver testing because the cryptographic algorithms are too weak.

9.1.2. Work continues

  1. Have an outline with ECDSA/NIST-384
  2. Have consolidated configuration across CAs.
  3. Trying to decide if/how to deal with revocation. What a PITA.

9.2. Need to be clear on security properties.

Definitely protect against remote access to private keys. How strong does the protection against local access need to be?

9.3. Simple hardware.

9.3.1. Use beagleboard with local interface

9.3.2. Use some modern device TPM

Need to export data for backup.

9.3.3. Or something that uses PKCS11 interface

9.4. USB Serial interface only but no credentials across USB I/F.

But this potentially exposes the hardware to remote access via the USB I/F when connected.

9.5. Use Sneakernet

Doesn't scale. Should use something so cert updates are automatable. But that's a science project it seems.

10. Compilers

10.1. Compiled Wikipedia PL/0 example

10.2. Work out overall plan.

Lots of moving pieces.

10.3. Looking into LLVM MLIR.

Will not use immediately, but perhaps trend in that direction.

10.4. ASDL

10.4.1. current smlnj C++ implementation incomplete

10.4.2. old versions asdl source fail to build with new versions of smlnj

10.4.3. old versions of smlnj not easily buildable on x8664

10.4.4. ancient binary of asdl 1.2 compiler seems to work

but associated libraries are to old to link because of missing ctype symbol

10.4.5. analyzing asdl 1.2 generated code

Most of the code is for serialization, which is going to be replaced anyway, so can be removed by hand.

10.4.6. run in vm?

Analysis of binaries shows that it was built on some redhat os using gcc 2.8.1. Redhat-6.2? No. Tried various ancient Redhat OSs.

11. Piper dovecot

11.1. Update broke dovecot auth.

Looks PAM related, but PAM update failed to fix.

11.2. Set tuffy up as a staging server

So I don't debug on 'production'.

11.3. piper dovecot SSL certificate NOT broken

At least not obviously broken (yet). Further investigation needed.

12. Various i686

12.0.1. netbsd

was installed. But needed the box for something else.

12.0.2. buildroot

builds complete.

13. piper

13.1. dovecot

13.1.1. Raising apparmor error.

Not sure how to resolve.

13.2. pidgeonhole

13.2.1. procmail replacement.

13.2.2. Considering integration.

13.3. httpd

13.3.1. Still stable.

But seems to occassionally mis-serve files.

13.4. SSL cert

Trying letsencrypt with certbot. http problem above may be interfering.

13.5. redmine

Still not sure I want to go down this rabbit hole.

13.6. openvpn

Need to consider cert construction.

14. Buffalo WZR-HP-G300NH

14.1. Update

Sometime next year.

15. SJC weather station

15.1. Proper enclosure mostly constructed

15.1.1. Needs a redo on bottom plate

15.1.2. Seems to have improved wireless connectivity somewhat

16. opencl

16.1. Studying. Have some examples working.

16.2. Need to look at arrayfire as an alternative.

16.3. This is a bit of a hammer looking for a nail.

17. EPLDH

17.1. MPFI interval arithmetic better alternative

18. wktpqb

18.1. needs a new approach

18.2. Verifying edge construction (con't.)

18.3. 'gcd' algorithm doesn't work

19. Mill Controller #2

19.1. Mounted on mill - ready or testing

19.2. Need to investigate new HW/SW for eventual replacements

19.2.1. Old crap ain't gonna last forever

19.2.2. Buildroot/Linux 5.15 PREEMPT + latency tools

First pass done - boots on real hardware

19.3. Alternative architecture

19.3.1. Split off stepper motor controller to separate board

Increase latency tolerance on controller

19.3.2. Use emc2 MODBUS/TCP protocol for stepper and other IO

20. Alum Rock Data Center

20.1. May have problem with network power module.

It's only 30 years old or something like that.

20.2. Added Ethernet card to tuffy

Preparing as backup/staging server.

20.3. Need a VPS with static IP

Just use dynamic interface to bind.

21. Virtual Orchestra

21.1. sfz file tests

21.1.1. need tooling to edit sample files

21.2. increasingly skeptical whether quality results are possible

21.3. maybe should treat as platform for concatinative synthesis

21.4. maybe should just accept the limitations and work with it

One should not be disappointed that a guitar can't sound like a flute.

22. gat

22.1. spectrogram done - matches 'octave' output

23. RIOT drivers

Implemented - needs testing.

23.1. WS2801

23.2. Velleman KA03

23.3. Velleman KA05

24. mcd05 32 button/led box

24.1. Recovered schematics.

24.2. Planning software.

24.3. Received STM32F767 Nucleo144 with Ethernet.

24.3.1. Test program running.

24.3.2. Need to consider CoAP multicast discovery.

24.3.3. Consider simpler architecture with STM32F767 as a 'hub'.

24.3.4. Consider CAN interface to hub.

25. AMD 2900 bitslice computing

25.1. Probably my oldest uncompleted project

25.2. Exploring possibilities for something constructive

Create verilog models for 2903/2910 and verify against hardware?

26. Hitachi HD68B09E CPU

26.1. RAM/UART/IO

26.2. Started schematic

26.2.1. Standard peripheral set for 8 bit CPU bringups

Board schematic planned - need Kicad symbols

26.3. Arduino Mega 2560 DMA loader

…Along with standard 8 bit loader

26.4. Generate quadrature clock directly

26.5. Full Bus SW Emulation infeasible

6809 1000ns maximum cycle time too short

27. Rockwell R65F11

27.1. Still evaluating.

27.2. Dev board

Reverse engineered some of a mostly fully built development board with one part missing. As near as I can tell, that one part is some sort of programmable address decoder with a pinout that does not correspond to any part I can find. Kind of like a GAL but with inputs on top and outputs on bottom (as opposed to left and right in a standard GAL). I have no idea what the provenance of this board is and if it ever worked.

28. PLD programming

Looks like Atmel 16V8 is the last 5V PLD part left standing. Maybe not surprising that there still doesn't appear to be a fully open source tool chain for programming. How hard could it be? (!) Could next-pnr generic help? Might be easier to use espresso for logic array and program output logic bits directly for simple stuff.

29. EPROM Programming

Found some software for Needham programmer. Need to check electrolytic caps on ISA board.

30. POSIT

30.1. Use POSITs for YRX?

No. Existing library is fine.

31. MAME

31.1. Subset builds in debug mode

Full debug fails - not enough disk or memory.

31.2. gs6809 serial IO doesn't work right with PTY and other streams

31.3. ampro (Z80/Z80SIO) does work with PTY

31.4. Evaluating what is needed for other emulators.

32. More project ideas

32.1. Zuse Z3 simulation in Verilog

Good excuse for floating point ALU design. Try posit format?

32.2. GMPForth ports to simulators

32.2.1. SIMH for some targets (vax)

32.2.2. MAME looks interesting for microprocessor system emulations

How to support ersatz systems?

32.2.3. Ports to classic figFORTH targets

32.3. GMPASM assembler

May be useful for handbuilt and rare systems (DMX1000?).

32.4. Extracting ISO Superboard Forth ROMS for MAME emulation

32.5. 'bwocl' OpenCL tooling

32.5.1. Offline compilation

32.5.2. Standard Kernel Running

32.6. hardware support for classic 5V CPUs

32.6.1. RTX2000, CDP1802 still available!

32.6.2. 6502, 68000, 320C30, others on hand

32.6.3. CPUs with totally async bus may be supportable without RAM

32.6.4. Could use small footprint monitor in asm (gmpmon?)

32.7. Existing 'retro' hardware still working?

32.7.1. OSI Superboard

Unknown. Composite to VGA adapter didn't seem to work. Needs analysis. Found OSI model 610 board underneath!

32.7.2. Super Jolt

No output. Needs analysis.

32.7.3. Ampro Little Board

Not booting. Needs analysis.

32.7.4. Rockwell R65F11 Demo board

UART sending "NO ROM" at 2400 7N1 as expected with 2MHz xtal. MAME emulator possibilities?

32.7.5. NMIX-0016

Works. Found original prom in a parts stash(!).

33. David Davies

33.1. Broadcom (BCG?) Employee indicted for running a brothel.

33.2. New case C1923172, consolidated with 15 Parties.

33.3. Court website no longer allows seaching (grrr!)

Author: Daniel Kelley

Created: 2024-07-27 Sat 14:27

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